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| Section | Weight | Objectives |
|---|---|---|
| Transmission Network Protection | 10% | - SDH/WDM/OTN protection schemes - Protection principles and classification - Protection configuration and application |
| Ethernet Principles and Services | 10% | - Service bearing and configuration - Basic Ethernet concepts - Carrier-grade Ethernet technologies |
| NG WDM Networking and Applications | 10% | - System features and networking modes - Protection and reliability - Service access and transmission |
| SDH Principles | 15% | - Frame structure and multiplexing - Synchronization and timing - Network topology and protection mechanisms |
| WDM Principles | 15% | - Signal flow and transmission performance - Basic principles and classification - Optical components and systems |
| OTN Principles and Technologies | 10% | - Frame structure and multiplexing - OTN hierarchy and interfaces - Mapping and adaptation mechanisms |
| Transmission Network Overview | 10% | - Network architecture and composition - Main technologies and application scenarios - Basic concepts and development history |
| Transmission Product Overview | 10% | - Hardware composition and functions - Typical application scenarios - OptiX series product positioning and features |
| NCE-T System Introduction | 5% | - Basic operation and management - System functions and architecture |
1. Which of the following is the OPUk payload structure identification overhead?
A) PSI
B) PJO
C) RES
D) NJO
2. R-LOS, R-LOF, AU-AIS, and TU-AIS alarms are all generated and reported on the circuit board.
A) False
B) True
3. NGWDK adopts LO-L1+L2 triple-extension architecture, in which the L2 layer implements switching based on Ethernet/MPLS-TP, the L. layer implements switching based on ODUk/C, and the L. layer implements switching based on I/O.
A) False
B) True
4. NEA and NEB are adjacent NEs. If day 3 and low-order bit errors occur in the A>day direction, and day 1082, B3 and low-order bit errors occur in the B>A direction, which of the following performance events are reported by NEA? (Multiple choice)
A) HPFEBBE
B) MSBBE
C) MSFEBBE
D) RSFEBBE
E) RSBBE
F) HPBBE
5. The bits of the S1 byte represent the clock quality level. Which of the following indicates the highest clock quality level?
A) S1=00001111
B) S1=00010100
C) S1=00100100
D) S1=00100010
Solutions:
| Question # 1 Answer: A | Question # 2 Answer: A | Question # 3 Answer: B | Question # 4 Answer: A,B,E,F | Question # 5 Answer: C |
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